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| 19-1945; Rev 5; 3/09 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package General Description The MAX4691-MAX4694 are low-voltage CMOS analog ICs configured as an 8-channel multiplexer (MAX4691), two 4-channel multiplexers (MAX4692), three singlepole/double-throw (SPDT) switches (MAX4693), and four SPDT switches (MAX4694). The MAX4691/MAX4692/MAX4693 operate from either a single +2V to +11V power supply or dual 2V to 5.5V power supplies. When operating from 5V supplies they offer 25 on-resistance (RON), 3.5 (max) RON flatness, and 3 (max) matching between channels. The MAX4694 operates from a single +2V to +11V supply. Each switch has rail-to-rail signal handling and a low 1nA leakage current. All digital inputs are 1.8V logic-compatible when operating from a +3V supply and TTL compatible when operating from a +5V supply. The MAX4691-MAX4694 are available in 16-pin, 4mm 4mm QFN and TQFN and 16-bump UCSP packages. The chip-scale package (UCSPTM) occupies a 2mm 2mm area, significantly reducing the required PC board area. o 1.8V Logic Compatibility o Guaranteed On-Resistance 70 (max) with +2.7V Supply 35 (max) with +5V Supply 25 (max) with 4.5V Dual Supplies o Guaranteed Match Between Channels 5 (max) with +2.7V Supply 3 (max) with 4.5V Dual Supplies o Guaranteed Flatness Over Signal Range 3.5 (max) with 4.5V Dual Supplies o Low Leakage Currents Over Temperature 20nA (max) at +85C o Fast 90ns Transition Time o Guaranteed Break-Before-Make o Single-Supply Operation from +2V to +11V o Dual-Supply Operation from 2V to 5.5V (MAX4691/MAX4692/MAX4693) o V+ to V- Signal Handling o Low Crosstalk: -90dB (100kHz) o High Off-Isolation: -88dB (100kHz) Features o 16 Bump, 0.5mm-Pitch UCSP (2mm x 2mm) MAX4691-MAX4694 Applications Audio and Video Signal Routing Cellular Phones Battery-Operated Equipment Communications Circuits Modems Ordering Information PART MAX4691EBE+T MAX4691EGE+ MAX4691ETE+T TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 16-Bump UCSP* 16 QFN-EP 16 TQFN-EP 16-Bump UCSP* 16 QFN-EP 16 TQFN-EP 16-Bump UCSP* 16 QFN-EP 16 TQFN-EP 16-Bump UCSP* 16 QFN-EP 16 TQFN-EP Functional Diagrams MAX4691 X0 X1 X2 X3 X4 X5 X6 X7 LOGIC X MAX4692EBE+T MAX4692EGE+ MAX4692ETE+T MAX4693EBE+T MAX4693EGE+ MAX4693ETE+T MAX4694EBE+T MAX4694EGE+ MAX4694ETE+T EN A B C Pin Configurations appear at end of data sheet. Functional Diagrams continued at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. *UCSP reliability is integrally linked to the user's assembly methods, circuit board, and environment. See the UCSP Reliability section for more information. EP = Exposed pad. +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 ABSOLUTE MAXIMUM RATINGS V+ to GND ..............................................................-0.3V to +12V Operating Temperature Range .......................... -40C to +85C V+ to V- (MAX4691/MAX4692/MAX4693) ..............-0.3V to +12V Storage Temperature Range ............................ -65C to +150C Voltage into any Terminal (Note 1) ...... (V- - 0.3V) to (V+ + 0.3V) Lead Temperature (Soldering) Continuous Current into any Terminal ............................. 20mA 16-Bump UCSP Infrared (15s) ................................... +220C Peak Current W_, X_, Y_, Z_ (pulsed at 1ms, Vapor Phase (60s)..................................................... +215C 10% duty cycle)...........................................................40mA 16-Pin QFN................................................................. +300C ESD per Method 3015.7......................................................> 2kV 16-Pin TQFN............................................................... +300C Continuous Power Dissipation (TA = +70C) 16-Bump UCSP (derate 8.3mW/C above +70C) .... 659mW 16-Pin QFN (derate 18.5mW/C above +70C) ....... 1481mW 16-Pin TQFN (derate 16.9mW/C above +70C) ..... 1349mW Note 1: Voltages exceeding V+ or V- on any signal terminal are clamped by internal diodes. Limit forward-diode current to maximum current rating. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS--Single +3V Supply (V+ = +2.7V to +3.6V, V- = 0, VIH = +1.4V, VIL = +0.4V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 2, 3, 4) PARAMETER ANALOG SWITCH VW, VX, VY, VZ, VW_, VX_, VY_, VZ_ RON V+ = 2.7V; IW, IX, IY, IZ = 1mA VW_, VX_, VY_, VZ_ = 1.5V V+ = 2.7V; IW, IX, IY, IZ = 1mA VW_, VX_, VY_, VZ_ = 1.5V V+ = 3.6V; VW, VX, VY, VZ = 3V, 0.6V; VW_, VX_, VY_, VZ_ = 0.6V, 3V V+ = 3.6V; VW, VX, VY, VZ = 3V, 0.6V; VW_, VX_, VY_, VZ_ = 0.6V, 3V V+ = 3.6V; VW, VX, VY, VZ = 0.6V, 3V; VW_, VX_, VY_, VZ_ = 0.6V, 3V, or unconnected SYMBOL CONDITIONS TA MIN TYP MAX UNITS Analog Signal Range -40C to +85C 0 V+ V On-Resistance (Note 5) On-Resistance Match Between Channels (Notes 5, 6) W_, X_, Y_, Z_ OffLeakage Current (Note 7) +25C -40C to +85C +25C -40C to +85C +25C -40C to +85C +25C -40C to +85C +25C -40C to +85C -1 -10 -2 -20 -2 -20 45 70 80 2 5 6 +1 nA +10 +2 nA +20 +2 nA +20 RON IW_, IX_, IY_, IZ_ IW(OFF), IX(OFF), IY(OFF), IZ(OFF) IW(ON), IX(ON), IY(ON), IZ(ON) W, X, Y, Z Off-Leakage Current (Note 7) W, X, Y, Z On-Leakage Current (Note 7) 2 _______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package ELECTRICAL CHARACTERISTICS--Single +3V Supply (continued) (V+ = +2.7V to +3.6V, V- = 0, VIH = +1.4V, VIL = +0.4V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 2, 3, 4) PARAMETER SYMBOL CW_(OFF), CX_(OFF), CY_(OFF), CZ_(OFF) CX(OFF), CY(OFF), CZ(OFF) CW(ON), CX(ON), CY(ON), CZ(ON) CONDITIONS TA MIN TYP MAX UNITS MAX4691-MAX4694 Input Off-Capacitance f = 1MHz, Figure 7 +25C 9 pF MAX4691 f = 1MHz, Figure 7 MAX4692 MAX4693 MAX4691 f = 1MHz, Figure 7 MAX4692 MAX4693 +25C +25C 68 36 20 78 46 30 pF pF Output Off-Capacitance On-Capacitance DYNAMIC Enable Turn-On Time (MAX4691/MAX4692/ MAX4693) Enable Turn-Off Time (MAX4691/MAX4692/ MAX4693) Address Transition Time Break-Before-Make Charge Injection Off-Isolation (Note 8) Crosstalk (Note 9) DIGITAL I/O Input Logic-High Input Logic-Low Input Leakage Current SUPPLY Positive Supply Current I+ V+ = 3.6V, VA, VB, VC, VEN = 0 or V+ +25C -40C to +85C 0.1 1 A VIH VIL IIN VA, VB, VC, V EN = 0 or V+ -1 1.4 0.4 +1 V V A tON VW_, VX_, VY_, VZ_ = 1.5V; RL = 300,CL = 35pF, Figure 2 VW_, VX_, VY_, VZ_ = 1.5V; RL = 300,CL = 35pF, Figure 2 VW_, VX_, VY_, VZ_ = 0, 1.5V; RL = 300, CL = 35pF, Figure 3 VW_, VX_, VY_, VZ_ = 1.5V; RL = 300, CL = 35pF, Figure 4 VGEN = 0; RGEN = 0; CL = 1nF, Figure 5 f = 0.1MHz, RL = 50, CL = 5pF, Figure 6 f = 0.1MHz, RL = 50, CL = 5pF, Figure 6 +25C -40C to +85C +25C -40C to +85C +25C -40C to +85C +25C -40C to +85C +25C +25C +25C 2 2 0.1 -70 -75 90 200 70 180 300 ns 350 100 ns 120 350 400 ns ns pC dB dB tOFF tTRANS tBBM Q VISO VCT _______________________________________________________________________________________ 3 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 ELECTRICAL CHARACTERISTICS--Single +5V Supply (V+ = +4.5V to +5.5V, V- = 0, VIH = +2V, VIL = +0.8V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 2, 3, 4) PARAMETER ANALOG SWITCH Analog Signal Range VW, VX, VY, VZ, VW_, VX_, VY_, VZ__ RON -40C to +85C +25C V+ = 4.5V; IW, IX, IY, IZ = 1mA; VW_, VX_, VY_, VZ_ = 3.5V -40C to +85C +25C RON V+ = 4.5V; IW, IX, IY, IZ = 1mA; VW_, VX_, VY_, VZ_ = 3.5V -40C to +85C 2 0 25 V+ 35 40 2 4 5 6 8 -1 -10 -2 -20 -2 -20 +1 nA +10 +2 nA +20 +2 nA +20 V SYMBOL CONDITIONS TA MIN TYP MAX UNITS On-Resistance (Note 5) On-Resistance Match Between Channels (Notes 5, 6) On-Resistance Flatness (Note 10) RFLAT(ON) +25C V+ = 4.5V; IW, IX, IY, IZ = 1mA; VW_, VX_, VY_, VZ_ = 1V, 2.25V, 3.5V -40C to +85C +25C V+ = 5.5V; VW, VX, VY, VZ = 4.5V, 1V_; VW_, VX_, VY_, VZ_ = 1V, 4.5V -40C to +85C +25C V+ = 5.5V; VW, VX, VY, VZ = 4.5V, 1V_; VW_, VX_, VY_, VZ_ = 1V, 4.5V -40C to +85C +25C V+ = 5.5V; VW, VX, VY, VZ = 1V, 4.5V_; VW_, VX_, VY_, VZ_ = 1V, 4.5V, or floating -40C to +85C W_, X_ , Y_, Z_ Off-Leakage Current (Note 7) IW_, IX_, IY_, IZ_ W, X, Y, Z Off-Leakage Current (Note 7) IW(OFF), IX (OFF), IY(OFF), IZ(OFF) IW(ON), IX(ON), IY(ON), IZ(ON) W, X, Y, Z On-Leakage Current (Note 7) DYNAMIC Enable Turn-On Time (MAX4691/MAX4692/MAX4693) Enable Turn-Off Time (MAX4691/MAX4692/MAX4693) Address Transition Time tON tOFF VW_, VX_, VY_, VZ_ = 3V; RL = 300, CL = 35pF, Figure 2 VW_, VX_, VY_, VZ_ = 3V; RL = 300, CL = 35pF, Figure 2 VW_, VX_, VY_, VZ_ = 0, 3V; RL = 300, CL = 35pF, Figure 3 VW_, VX_, VY_, VZ_ = 3V; RL = 300, CL = 35pF, Figure 4 VGEN = 0; RGEN = 0; CL = 1nF, Figure 5 +25C -40C to +85C +25C -40C to +85C +25C -40C to +85C +25C -40C to +85C +25C 2 2 90 130 150 ns ns 45 100 60 70 140 160 tTRANS tBBM Q ns Break-Before-Make Charge Injection 35 ns pC 0.2 4 _______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package ELECTRICAL CHARACTERISTICS--Single +5V Supply (continued) (V+ = +4.5V to +5.5V, V- = 0, VIH = +2V, VIL = +0.8V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 2, 3, 4) PARAMETER Off-Isolation (Note 8) Crosstalk (Note 9) DIGITAL I/O Input Logic-High Input Logic-Low Input Leakage Current SUPPLY Positive Supply Current I+ V+ = 5.5V; VIN_ = 0 or V+ +25C -40C to +85C -1 0.1 1 A VIH VIL ILEAKAGE VIN_ = 0 or V+ -1 2 0.8 +1 V V A SYMBOL VISO VCT CONDITIONS f = 0.1MHz, RL = 50, CL = 5pF Figure 6 f = 0.1MHz, RL = 50, CL = 5pF Figure 6 TA +25C +25C MIN TYP -80 -87 MAX UNITS dB dB MAX4691-MAX4694 ELECTRICAL CHARACTERISTICS--Dual 5V Supplies (MAX4691/MAX4692/MAX4693 only) (V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, VIH = +2V, VIL = +0.8V, TA = -40C to +85C, unless otherwise noted.) (Notes 2, 3, 4) PARAMETER ANALOG SWITCH Analog Signal Range On-Resistance (Note 5) VX, VY, VZ, VX_, VY_, VZ_ RON -40C to +85C +25C V+ = 4.5V; IX, IY, IZ = 10mA; V- = -4.5V; VX_, VY_, VZ_ = 3.5V -40C to +85C +25C RON V+ = 4.5V; V- = -4.5V; IX, IY, IZ = 10mA; VX_, VY_, VZ_ = 3.5V -40C to +85C 2.5 V18 V+ 25 30 2 3 4 3.5 4 -1 -10 -2 -20 +1 nA -40C to +85C +25C -40C to +85C +10 +2 +20 nA V SYMBOL CONDITIONS TA MIN TYP MAX UNITS On-Resistance Match Between Channels (Notes 5, 6) On-Resistance Flatness (Note 10) RFLAT(ON) +25C V+ = 4.5V; V- = -4.5V; IX, IY, IZ = 10mA; VX, VY, VZ = 3.5V, 0, -3.5V -40C to +85C +25C X_ , Y_, Z_ Off-Leakage Current (Note 7) IX_, IY_, IZ_ IX (OFF), IY(OFF), IZ(OFF) V+ = 5.5V; V- = -5.5V; VX, VY, VZ = +4.5V; VX_, VY_, VZ_ = 4.5V V+ = 5.5V; V- = -5.5V; VX, VY, VZ = +4.5V; VX_, VY_, VZ_ = 4.5V X, Y, Z Off-Leakage Current (Note 7) _______________________________________________________________________________________ 5 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 ELECTRICAL CHARACTERISTICS--Dual 5V Supplies (continued) (MAX4691/MAX4692/MAX4693 only) (V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, VIH = +2V, VIL = +0.8V, TA = -40C to +85C, unless otherwise noted.) (Notes 2, 3, 4) PARAMETER X, Y, Z On-Leakage Current (Note 7) DYNAMIC Enable Turn-On Time Enable Turn-Off Time tON tOFF +25C VX_, VY_, VZ_ = 3V; RL = 300, CL = 35pF, Figure 2 -40C to +85C +25C VX_, VY_, VZ_ = 3V; RL = 300, CL = 35pF, Figure 2 -40C to +85C VX_, VY_, VZ_ = 0, 3V; RL = 300, CL = 35pF, Figure 3 +25C -40C to +85C 2 2 1.8 -82 -84 0.02 20 55 80 90 35 60 50 60 90 ns 100 ns pC dB dB % ns ns SYMBOL IX(ON), IY(ON), IZ(ON) CONDITIONS V+ = 5.5V; V- = -5.5V; VX, VY, VZ = 4.5V; VX_, VY_, VZ_ = 4.5V, or unconnected TA +25C -40C to +85C MIN -2 -20 TYP MAX 2 nA 20 UNITS Address Transition Time tTRANS Break-Before-Make Charge Injection Off-Isolation (Note 8) Crosstalk (Note 9) Total Harmonic Distortion DIGITAL I/O Input Logic-High Input Logic-Low Input Leakage Current SUPPLY Positive Supply Current tBBM Q VISO VCT THD +25C VX_, VY_, VZ_ = 3V; RL = 300, CL = 35pF, Figure 4 -40C to +85C VGEN = 0; R GEN = 0; CL = 1nF, Figure 5 f = 0.1MHz, RL = 50, CL = 5pF, Figure 6 f = 0.1MHz, RL = 50, CL = 5pF, Figure 7 f = 20Hz to 20kHz, VX, VY, VZ = 5Vp-p; RL = 600, +25C +25C +25C +25C VIH VIL IIN VA, VB, VC, V EN = 0 or V+ V+ = 5.5V; V- = 5.5V; VA, VB, VC, V EN = 0 or V+ +25C -40C to +85C 2 0.8 -1 +1 0.1 1 V V A I+ A Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value is a maximum, is used in this data sheet. Note 3: UCSP parts are 100% tested at TA = +25C. Limits across the full temperature range are guaranteed by correlation. Note 4: QFN and TQFN parts are 100% tested at TA = +85C. Limits across the full temperature range are guaranteed by correlation. Note 5: UCSP RON and RON match are guaranteed by design. Note 6: RON = RON(MAX) - RON(MIN). Note 7: Leakage parameters are guaranteed by design. Note 8: Off-isolation = 20log10 (VW,X,Y,Z / VW_,X_,Y_,Z_), VW,X,Y,Z = output, VW_,X_,Y_,Z_ = input to off switch. Note 9: Between any two switches. Note 10: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. 6 _______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package Typical Operating Characteristics (TA = +25C, unless otherwise noted.) MAX4691-MAX4694 ON-RESISTANCE vs. VX, VY, VZ (DUAL SUPPLIES) MAX4691 toc01 ON-RESISTANCE vs. VX, VY, VZ AND TEMPERATURE (DUAL SUPPLIES) MAX4691 toc02 ON-RESISTANCE vs. VW, VX, VY, VZ (SINGLE SUPPLY) 90 80 70 60 RON () V+ = +2.7V V+ = +3.3V V+ = +5V V+ = +7.5V V+ = +2V MAX4691 toc03 40 V+ = +2V V- = -2V 30 RON () V+ = +2.7V V- = -2.7V V+ = +3.3V V- = -3.3V 24 22 20 18 RON () 16 14 12 TA = +85C V+ = +5V V- = -5V 100 20 50 40 30 10 V+ = +5V V- = -5V 0 -6 -4 -2 0 VX, VY, VZ (V) 2 4 6 10 8 6 -5 -3 -1 1 TA = -40C TA = +25C 20 10 0 V+ = +10V 0 2 4 6 8 10 12 3 5 VX, VY, VZ (V) VW, VX, VY, VZ (V) ON-RESISTANCE vs. VW, VX, VY, VZ AND TEMPERATURE (SINGLE SUPPLY) 34 32 30 28 26 24 22 20 18 16 14 12 10 0 1 MAX4691 toc04 ON-RESISTANCE vs. VW, VX, VY, VZ AND TEMPERATURE (SINGLE SUPPLY) TA = +85C 40 V+ = +3.3V MAX4691 toc05 SUPPLY CURRENT vs. TEMPERATURE (DUAL SUPPLIES) V+ = +5V V- = -5V VA, VB, VC, VEN = 0, +5V MAX4691 toc06 50 10 V+ = +5V TA = +85C 1 I+, I- (nA) RON () RON () 30 TA = +25C 0.1 I+ I- TA = +25C TA = -40C 20 TA = -40C 0.01 10 2 3 4 5 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 VW, VX, VY, VZ (V) VW, VX, VY, VZ (V) 0.001 -40 -15 10 35 60 85 TEMPERATURE (C) SUPPLY CURRENT vs. TEMPERATURE (SINGLE SUPPLY) MAX4691 toc07 I+ vs. LOGIC LEVEL 1A 0.1A 0.01A 1mA 0.1mA 0.01mA 1A 0.1A 0.01A 1nA 0.1nA 0.01nA 1pA 0 1 2 3 4 5 VA, VB, VC, VENB (V) MAX4691 toc08 LOGIC-LEVEL THRESHOLD vs. V+ 1.8 1.6 VA, VB, VC, VEN (V) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2 3 4 5 6 7 8 9 10 11 V+ (V) MAX4691 toc09 10 V+ = +5V VA, VB, VC, VEN = 0, +5V 1 I+, I- (nA) 2.0 0.1 0.01 0.001 -40 -15 10 35 60 85 TEMPERATURE (C) _______________________________________________________________________________________ I+ 7 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) ON-LEAKAGE CURRENT vs. TEMPERATURE MAX4691 toc10 OFF-LEAKAGE CURRENT vs. TEMPERATURE V+ = +5.5V V- = -5.5V 1 OFF-LEAKAGE (nA) W, X, Y, Z 0.1 MAX4691 toc11 TURN-ON/TURN-OFF TIME vs. TEMPERATURE (DUAL SUPPLY) V+ = +5.5V V- = -5.5V TURN-ON MAX4691 toc12 10 V+ = +5.5V V- = -5.5V 10 65 TURN-ON/TURN-OFF TIME (ns) 60 55 50 45 40 35 TURN-OFF 1 ON-LEAKAGE (nA) 0.1 0.01 0.01 W_, X_, Y_, Z_ 0.001 0.001 0.0001 -40 -15 10 35 60 85 TEMPERATURE (C) 0.0001 -40 -15 10 35 60 85 TEMPERATURE (C) 30 -40 -15 10 35 60 85 TEMPERATURE (C) TURN-ON/TURN-OFF TIME vs. TEMPERATURE (SINGLE SUPPLY) MAX4691 toc13 TURN-ON/TURN-OFF TIME vs. SUPPLY VOLTAGE MAX4691 toc14 CHARGE INJECTION vs. VW, VX, VY, VZ 3.0 2.5 Q (pC) 2.0 1.5 1.0 V+ = +5V V- = -5V V+ = +5V V- = 0 MAX4691 toc15 90 V+ = +5.5V TURN-ON/TURN-OFF TIME (ns) 80 70 60 TURN-OFF 50 40 30 -40 -15 10 35 60 TURN-ON 380 TURN-ON/TURN-OFF TIME (ns) 330 280 230 TURN-ON 180 130 TURN-OFF 80 30 3.5 0.5 0 2 3 4 5 SUPPLY VOLTAGE V+, V- (V) 6 -5 -4 -3 -2 V+ = +3V V- = 0 85 -1 0 1 2 3 4 5 TEMPERATURE (C) VW, VX, VY, VZ (V) FREQUENCY RESPONSE vs. 5V SUPPLIES MAX4691 toc16 FREQUENCY RESPONSE vs. +3V SUPPLIES MAX4691 toc17 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY MAX4691 toc18 0 -20 -40 OFF-ISOLATION LOSS (dB) ON-RESPONSE 0 -20 -40 LOSS (dB) -60 -80 CROSSTALK -100 -120 -140 ON-RESPONSE OFF-ISOLATION 0.1 V+ = +3V V- = 0 THD+N (%) 0.01 V+ = +5V V- = -5V -60 -80 -100 -120 -140 0.001 0.01 0.1 1 10 100 FREQUENCY (MHz) CROSSTALK 0.001 0.001 0.01 0.1 1 10 100 10 100 1k FREQUENCY (Hz) 10k 100k FREQUENCY (MHz) 8 _______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package Pin Description MAX4691 PIN UCSP A4, B4, C4, D4, A1, B1, C1, D1 A2 D3, D2, A3 B2 B3 C2 C3 -- QFN-EP/ TQFN-EP 16, 1, 3, 4, 12, 11, 9, 8 13 5, 7, 15 14 2 10 6 -- NAME FUNCTION MAX4691-MAX4694 X0-X7 X A, B, C VGND EN V+ EP Analog Switch Inputs 0-7 Analog Switch Common Digital Address Inputs Negative Analog Supply Voltage Input. Connect V- to GND for single-supply operation. Ground. Connect to digital ground. (Analog signals have no ground reference; they are limited to V+ and V-.) Digital Enable Input. Normally connect EN to GND. EN can be driven to logic high to set all switches off. Positive Analog and Digital Supply Voltage Input Exposed Pad. Connect EP to V+. MAX4692 PIN UCSP A1, B1, C1, D1 A4, B4, C4, D4 A2 A3 D3, D2 B2 B3 C2 C3 -- QFN-EP/ TQFN-EP 12, 11, 9, 8 16, 1, 3, 4 13 15 5, 7 14 2 10 6 -- NAME FUNCTION X0-X3 Y0-Y3 X Y A, B VGND EN V+ EP Analog Switch "X" Inputs 0-3 Analog Switch "Y" Inputs 0-3 Analog Switch "X" Common Analog Switch "Y" Common Digital Address Inputs for both "X" and "Y" Analog Switches Negative Analog Supply Voltage Input. Connect V- to GND for single-supply Ground. Connect to digital ground. (Analog signals have no ground reference; they are limited to V+ and V-.) Digital Enable Input. Normally connect EN to GND. EN can be driven to logic high to set all switches off. Positive Analog and Digital Supply Voltage Input Exposed Pad. Connect EP to V+. _______________________________________________________________________________________ 9 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 Pin Description (continued) MAX4693 PIN UCSP A1 B1 A4 B4 D1 C1 A2 A3 D2 C4 D4 D3 B2 B3 C2 C3 -- QFN-EP/ TQFN-EP 12 11 16 1 8 9 13 15 7 3 4 5 14 2 10 6 -- NAME X0 X1 Y0 Y1 Z0 Z1 X Y Z A B C VGND EN V+ EP FUNCTION Analog Switch "X" Normally Closed Input Analog Switch "X" Normally Open Input Analog Switch "Y" Normally Closed Input Analog Switch "Y" Normally Open Input Analog Switch "Z" Normally Closed Input Analog Switch "Z" Normally Open Input Analog Switch "X" Common Analog Switch "Y" Common Analog Switch "Z" Common Analog Switch "X" Digital Control Input Analog Switch "Y" Digital Control Input Analog Switch "Z" Digital Control Input Negative Analog Supply Voltage Input. Connect V- to GND for single-supply operation. Ground. Connect GND to digital ground. (Analog signals have no ground reference; they are limited to V+ and V-.) Digital Enable Input. Normally connect EN to GND. EN can be driven to logic high to set all switches off. Positive Analog and Digital Supply Voltage Input Exposed Pad. Connect EP to V+. 10 ______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package Pin Description (continued) MAX4694 PIN USCP D4 C4 A1 B1 A4 B4 D1 C1 D3 A2 A3 D2 B2 B3 C2 C3 -- QFN-EP/ TQFN-EP 4 3 12 11 16 1 8 9 5 13 15 7 14 2 10 6 -- NAME W0 W1 X0 X1 Y0 Y1 Z0 Z1 W X Y Z GND A B V+ EP FUNCTION Analog Switch "W" Normally Closed Input Analog Switch "W" Normally Open Input Analog Switch "X" Normally Closed Input Analog Switch "X" Normally Open Input Analog Switch "Y" Normally Closed Input Analog Switch "Y" Normally Open Input Analog Switch "Z" Normally Closed Input Analog Switch "Z" Normally Open Input Analog Switch "W" Common Analog Switch "X" Common Analog Switch "Y" Common Analog Switch "Z" Common Ground Analog Switch "W" and "Y" Digital Control Input Analog Switch "X" and "Z" Digital Control Input Positive Analog and Digital Supply Voltage Input Exposed Pad. Connect EP to V+. MAX4691-MAX4694 ______________________________________________________________________________________ 11 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 Table 1. Truth Table/Switch Programming EN 1 1 0 0 0 0 0 0 0 0 ADDRESS BITS C2 B A X 0 0 0 0 1 1 1 1 X 0 0 1 1 0 0 1 1 X 0 1 0 1 0 1 0 1 MAX4691 All switches open X-X0 X-X1 X-X2 X-X3 X-X4 X-X5 X-X6 X-X7 MAX4692 ON SWITCHES MAX4693 All switches open X-X0, Y-Y0, Z-Z0 X-X1, Y-Y0, Z-Z0 X-X0, Y-Y1, Z-Z0 X-X1, Y-Y1, Z-Z0 X-X0, Y-Y0, Z-Z1 X-X1, Y-Y0, Z-Z1 X-X0, Y-Y1, Z-Z1 X-X1, Y-Y1, Z-Z1 MAX4694 -- W-W0, X-X0, Y-Y0, Z-Z0 W-W1, X-X0, Y-Y1, Z-Z0 W-W0, X-X1, Y-Y0, Z-Z1 W-W1, X-X1, Y-Y1, Z-Z1 W-W0, X-X0, Y-Y0, Z-Z0 W-W1, X-X0, Y-Y1, Z-Z0 W-W0, X-X1, Y-Y0, Z-Z1 W-W1, X-X1, Y-Y1, Z-Z1 All switches open X-X0, Y-Y0 X-X1, Y-Y1 X-X2, Y-Y2 X-X3, Y-Y3 X-X0, Y-Y0 X-X1, Y-Y1 X-X2, Y-Y2 X-X3, Y-Y3 X = Don't care 1. EN is not present on the MAX4694. 2. C is not present on the MAX4692 and MAX4694. Detailed Description The MAX4691-MAX4694 are low-voltage CMOS analog ICs configured as an 8-channel multiplexer (MAX4691), two 4-channel multiplexers (MAX4692), three SPDT switches (MAX4693), and four SPDT switches (MAX4694). All switches are bidirectional. The MAX4691/MAX4692/MAX4693 operate from either a single +2V to +11V power supply or dual 2V to 5.5V power supplies. When operating from 5V supplies they offer 25 on-resistance (RON), 3.5 max RON flatness, and 3 max matching between channels. The MAX4694 operates from a single +2V to +11V supply. Each switch has rail-to-rail signal handling, fast switching times of tON = 80ns, tOFF = 50ns, and a low 1nA leakage current. All digital inputs are 1.8V logic-compatible when operating from a +3V supply and TTL-compatible when operating from a +5V supply. A, B, C determine which switch is closed. The two 4-1 muxes in the MAX4692 are controlled by the same address pins (A and B). (Table 1) The MAX4693 and MAX4694 offer SPDT switches in triple and quadruple packages. In the MAX4693, each switch has a unique control input. The MAX4694 has two digital control inputs: A (for switches "W" and "Y") and B (for switches "X" and "Z"). (Table 1) Applications Information Power-Supply Considerations Overview The MAX4691-MAX4694 construction is typical of most CMOS analog switches. V+ and V-* are used to drive the internal CMOS switches and set the limits of the analog voltage on any switch. Reverse ESD-protection diodes are internally connected between each analog signal pin and both V+ and V-. If any analog signal exceeds V+ or V-, one of these diodes will conduct. *V- is found only on the MAX4691/MAX4692/MAX4693. Digital Inputs The MAX4691 and MAX4692 include address pins that allow control of the multiplexers. For the MAX4691, pins 12 ______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package During normal operation, these (and other) reversebiased ESD diodes leak, forming the only current drawn from V+ or V-. Virtually all the analog leakage current comes from the ESD diodes. Although the ESD diodes on a given signal pin are identical, and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog signal path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of either the same or opposite polarity. V+ and GND power the internal logic and logic-level translators, and set both the input and output logic limits. The logic-level translators convert the logic levels into switched V+ and V- signals to drive the gates of the analog signals. This drive signal is the only connection between the logic supplies (and signals) and the analog supplies. V+ and V- have ESD-protection diodes on GND. unchanged, and the difference between V+ and Vshould not exceed 12V. These protection diodes are not recommended when using a single supply if signal levels must extend to ground. MAX4691-MAX4694 UCSP Reliability The chip-scale package (UCSP) represents a unique package that greatly reduces board space compared to other packages. UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering a UCSP. Performance through Operating Life Test and Moisture Resistance is equal to conventional package technology as it is primarily determined by the wafer-fabrication process. However, this form factor may not perform equally to a packaged product through traditional mechanical reliability tests. Mechanical stress performance is a greater consideration for a UCSP. UCSP solder joint contact integrity must be considered since the package is attached through direct solder contact to the user's PC board. Testing done to characterize the UCSP reliability performance shows that it is capable of performing reliably through environmental stresses. Results of environmental stress tests and additional usage data and recommendations are detailed in the UCSP application note, which can be found on Maxim's website, at www.maxim-ic.com. Bipolar Supplies The MAX4691/MAX4692/MAX4693 operate with bipolar supplies between 2V and 5.5V. The V+ and V- supplies need not be symmetrical, but their difference cannot exceed the absolute maximum rating of +12V. Single Supply These devices operate from a single supply between +2V and +11V when V- is connected to GND. All of the bipolar precautions must be observed. At room temperature, they operate with a single supply at near or below +2V, although as supply voltage decreases, switch on-resistance and switching times become very high. Always bypass supplies with a 0.1F capacitor. V+ EXTERNAL BLOCKING DIODE D1 V+ * COM * NO MAX4691 MAX4692 MAX4693 MAX4694 Overvoltage Protection Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings, because stresses beyond the listed ratings can cause permanent damage to the devices. Always sequence V+ on first, then V-, followed by the logic inputs and by W, X, Y, Z. If power-supply sequencing is not possible, add two small signal diodes (D1, D2) in series with the supply pins for overvoltage protection (Figure 1). Adding diodes reduces the analog signal range to one diode drop below V+ and one diode drop above V-, but does not affect the devices' low switch resistance and low leakage characteristics. Device operation is * V(GND) * EXTERNAL BLOCKING DIODE D2 V- (GND ) *INTERNAL PROTECTION DIODES ( ) ARE FOR THE MAX4694 ONLY, REPLACE V- WITH GND. Figure 1. Overvoltage Protection ______________________________________________________________________________________ 13 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 Test Circuits/Timing Diagrams V+ V+ A B C VEN 50 300 VV+ V+ A B V+ VEN X0, Y0 V+ 0 VX0, VY0 90% X, Y GND 50 VV+ V+ A B C V+ VEN X1, Y1, Z1 V+ 0 VW0, VX0, VY0, VZ0 VOUT 35pF 300 VV- = 0 FOR SINGLE-SUPPLY OPERATION. TEST EACH SECTION INDIVIDUALLY. VOUT VW1, VX1, VY1, VZ1 90% 50% V300 35pF VOUT 50% V+ VEN X0 X1-X7 V+ 0 VX0 90% X GND V35pF 0 tOFF tON VOUT VOUT 90% 50% MAX4691 EN X1, X2, X3, Y1, Y2, Y3 MAX4692 VEN EN VOUT 0 tOFF 90% tON MAX4693 X0, Y0, Z0 VEN EN GND 50 X, Y, Z VV- 90% tOFF tON Figure 2. Enable Transition Time 14 ______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package Test Circuits/Timing Diagrams (continued) V+ V+ VA, VB, VC A 50 B C V+ VA, VB, VC X0 X1-X6 V+ 0 VX0 VVOUT 35pF 300 VVOUT VX7 tTRANS tTRANS 0 90% 90% 50% MAX4691-MAX4694 MAX4691 EN GND V- X7 X V+ V+ VA, VB A B 50 V+ VA, VB X0, Y0 V+ 0 VX0, VY0 VVOUT 35pF 300 V0 VOUT VX3, VY3 tTRANS tTRANS 90% 50% X1, X2, Y1, Y2 MAX4692 X3, Y3 EN GND VX, Y 90% V+ V+ VA, VB, VC A, B, C V+ W1, X1, Y1, Z1 VA, VB, VC V0 VW0, VX0, VY0, VZ0 VOUT 35pF 300 V0 VOUT VW1, VX1, VY1, VZ1t 90% 50% 50 MAX4693 MAX4694 EN W0, X2, Y2, Z2, X0, Y0, Z0 X, Y, Z GND VV+ 90% TRANS tTRANS V- = 0 FOR SINGLE-SUPPLY OPERATION. (NOT PRESENT ON THE MAX4694) TEST EACH SECTION INDIVIDUALLY. Figure 3. Address Transition Time ______________________________________________________________________________________ 15 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 Test Circuits/Timing Diagrams (continued) V+ VA, VB, VC A 50 B C V+ X0-X7 V+ 50 VA, VB A B V+ V+ X0-X3, Y0-Y3 V+ MAX4691 EN GND V300 VV+ VA, VB, VC A, B, C 50 V+ W0, W1, X0, X1, Y0, Y1, Z0, Z1 V+ V+ VA, VB, VC 0 VW, VX, VY, VZ X 35pF VOUT EN MAX4692 X, Y GND V300 V35pF VOUT 50% tR < 20ns tF < 20ns MAX4693 MAX4694 EN W, X, Y, Z GND V300 VV- = 0 FOR SINGLE-SUPPLY OPERATION. (NOT PRESENT ON THE MAX4694) TEST EACH SECTION INDIVIDUALLY. VOUT 35pF 90% VOUT 0 tBBM Figure 4. Break-Before-Make Interval V+ V+ A CHANNEL SELECT B C VEN 50 VV- = 0 FOR SINGLE-SUPPLY OPERATION. (NOT PRESENT ON THE MAX4694) TEST EACH SECTION INDIVIDUALLY. V+ W_, X_, Y_, Z_ VEN 0 MAX4691- MAX4694 W, X, Y, Z VVOUT CL = 1000pF VOUT VOUT EN GND VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF. Q = VOUT X CL Figure 5. Charge Injection 16 ______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package Test Circuits/Timing Diagrams (continued) MAX4691-MAX4694 V+ 10nF NETWORK ANALYZER 50 50 A CHANNEL SELECT VEN EN GND B C V+ W_, X_, Y_, Z_ VIN OFF-ISOLATION = 20log VOUT VIN VOUT VIN VOUT VIN MAX4691- MAX4694 VOUT W, X, Y, Z VMEAS. REF. ON-LOSS = 20log CROSSTALK = 20log 50 50 10nF VMEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM AND "OFF" NO TERMINAL ON EACH SWITCH. ON LOSS IS MEASURED BETWEEN COM AND "ON" NO TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. V- IS NOT PRESENT ON THE MAX4694. Figure 6. Off-Isolation, On-Loss, and Crosstalk V+ A CHANNEL SELECT B C V+ W_, X_, Y_, Z_ MAX4691- MAX4694 GND W, X, Y, Z V1MHz CAPACITANCE ANALYZER EN V- V- IS NOT PRESENT ON THE MAX4694. Figure 7. Capacitance ______________________________________________________________________________________ 17 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 Functional Diagrams (continued) MAX4692 X0 X1 X2 X3 X0 X1 X2 X3 LOGIC Y X EN A B Z0 Z Z1 Y0 Y Y1 X0 X X1 MAX4693 W0 W W1 Y0 Y Y1 MAX4694 X0 X X1 Z0 Z Z1 EN A B C A B Chip Information PROCESS: BiCMOS 18 ______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package Pin Configurations TOP VIEW MAX4691-MAX4694 MAX4691 1 2 3 4 X0 16 C 15 V14 X X0 13 12 V14 C + A X4 X C X0 X1 B X5 VGND X1 1 + EP* X4 X1 GND 2 11 X5 GND X2 X3 X3 4 9 X6 1 2 3 4 16 15 + 13 12 11 X X4 X5 EN X6 MAX4691 C X6 EN V+ X2 X2 3 10 EN MAX4691 *EP 5 6 7 8 13 X X7 10 9 D X7 B A X3 A 5 6 V+ 7 8 X7 V+ 15 Y B 14 V- UCSP MAX4692 1 2 3 4 A QFN B TQFN *EXPOSED PAD. CONNECT EP TO V+. *EXPOSED PAD. CONNECT EP TO V+. Y0 16 X0 X Y Y0 Y1 B X1 VGND Y1 1 EP* GND 2 11 X1 Y1 GND 10 EN Y2 Y3 Y3 D X3 B A Y3 4 9 X2 1 2 3 4 Y 15 V14 X 13 12 + A + 16 X0 Y0 + 12 11 MAX4692 *EP 10 9 X0 X1 EN X2 MAX4692 C X2 EN V+ Y2 Y2 3 5 6 7 B A V+ 5 A 6 V+ 7 B 8 X3 UCSP QFN *EXPOSED PAD. CONNECT EP TO V+. TQFN *EXPOSED PAD. CONNECT EP TO V+. ______________________________________________________________________________________ X3 8 19 Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package MAX4691-MAX4694 Pin Configurations (continued) CONNECT EP TO V+. TOP VIEW CONNECT EP TO V+. MAX4693 1 2 3 4 Y0 16 X0 X Y Y0 Y1 B X1 VGND Y1 1 EP* GND 2 11 Y 15 V14 X 13 Y0 V14 Y 12 X 13 12 11 MAX4693 *EP 5 6 7 8 10 9 + A + X0 Y1 GND 10 EN A B B 4 9 Z1 1 2 3 4 16 + 15 X1 X0 X1 EN Z1 MAX4693 C Z1 EN V+ A A 3 D Z0 Z C B C V+ Z GND 14 5 C 6 V+ 7 Z 8 Z0 Z0 13 12 11 MAX4694 *EP 5 6 7 8 10 9 X UCSP MAX4694 1 2 3 4 Y0 16 X0 X Y Y0 Y1 B X1 GND A Y1 1 EP* A 2 Y 15 QFN *EXPOSED PAD. CONNECT EP TO V+. GND 14 X 13 Y0 16 Y1 A 10 B W1 W0 W0 4 9 Z1 1 2 3 4 12 X0 TQFN *EXPOSED PAD. CONNECT EP TO V+. + A + 15 Y + 11 X1 X0 X1 B Z1 MAX4694 C Z1 B V+ W1 W1 3 D Z0 Z W W0 W V+ Z 5 W 6 V+ 7 Z 8 Z0 Z0 UCSP QFN *EXPOSED PAD. CONNECT EP TO V+. TQFN *EXPOSED PAD. CONNECT EP TO V+.. Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 16 QFN 16 TQFN-EP 16 UCSP PACKAGE CODE B16+1 G1644+1 T1644+4 DOCUMENT NO. 21-0101 21-0106 21-0139 20 ______________________________________________________________________________________ Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/ Quad SPDT in UCSP Package Revision History REVISION NUMBER 0 1 2 3 4 5 REVISION DATE 1/01 7/01 2/03 12/06 8/08 3/09 Initial release Added UCSP Package Removed statement in Features section with UCSP now qualified Exposed Paddle Connection information edited, style changes Added part numbers, package diagram, and TQFN packaging Added lead-free packaging, edited Pin Description, revised Chip Information, changed "floating" to "unconnected," style changes DESCRIPTION PAGES CHANGED -- -- -- 1, 9, 10, 11, 19, 21, 22 1-26 1-6, 9, 10, 11, 18-21 MAX4691-MAX4694 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21 (c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. |
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